8.3.6 Deep silicon etching
MEMS structures often require etching to a much greater depth than is needed for microelectronics. A rate of 1–2 μm min−1 may be quite sufficient for making transistors less than 1 mm deep, but to etch through 600 mm of silicon to form an accelerometer would take all day. The advent of MEMS and wafer-level packaging applications, therefore, brought a need for yet faster anisotropic etches, requiring advances both in the process and in the etching equipment.
Capacitive coupling, used in RIE at higher pressure, cannot deliver high power without very high bias voltages. Conversely, ICP etches become inefficient and non-uniform at high pressure: as diffusion slows, power coupling becomes localised so the gas in most of the chamber is not dissociated. The answer is a downstream source: gas is fed through a small, high-power inductive region, then expands to fill the reaction chamber containing the wafer.
On the process side, etching remains with the most reactive choice of SF6, with more power, more pressure and more flow all resulting in faster processing. This soon reaches a limit, though, as the more aggressive etch punches through the thin oxide passivation layer and adding more oxygen just makes it impossible to clear the etch floor. For the etch rate to be further increased, more robust sidewall passivation is required.
One solution is to cool the wafer: the silicon oxyfluoride created in the SF6/O2 etch is less volatile than SiF4, and low temperature can hold it on the surface. There is a snag: ‘low’ means −100 °C, so a specially designed wafer stage, complex measures to prevent condensation and a ready supply of liquid nitrogen are required.
A simpler solution is not to form the passivation layer by a reaction with silicon, but to deposit it as a thick layer using fluorocarbon polymer (like the non-stick coating on a frying pan); suitable precursors include CHF3, C3F8, and C4F8. Unfortunately, for polymerisation the F:C ratio in the plasma must not exceed 3:1, but this is incompatible with the huge fluorine quantities required for fast etching. Robert Bosch GmbH found the way around this problem. Although a fluorine etch plasma and a fluorocarbon depositing plasma cannot be used together, you can switch from one to the other and back again repeatedly.
Deep reactive ion etching (DRIE) using the patented Bosch process achieves a vertical profile by alternating etching and deposition cycles, while collimated ion bombardment keeps the base of the feature clear. Selectivity to lithographic masks is excellent, the process operates at room temperature, and the polymer is easily removed with an oxygen plasma when the etch is complete.
A collimated beam of ions is one in which each ion's trajectory is parallel to that of all the others.
DRIE-etched walls show scallops (Figure 40) recording the history of the cycles, as rings on a tree record the passage of the seasons. The scallops’ undercut also means that etched features can be up to 1 mm wider than the pattern defined by the lithography. Although this is acceptable for mechanical devices, optical and moulding applications require much smoother walls. Scallop reduction is a current challenge for the Bosch process: gas cycling must be speeded up, and the process adjusted towards heavier passivation.